01 SISTEM BILANGAN

02 Operasi dalam sistem bilangan

03-05 Boolean Algebra

08 Adders & Subtractor

Modul 1 Pengenalan Desain Sistem Digital

Modul 2 Pengenalan VHDL

ch6 Combinational Cuircuit Blocks

ch7 FF, Registers, Counters

ch8 Finite State Machine

ch8 FSM Design

!! Petunjuk Proyek Akhir !!

!! Format Laporan Proyek Akhir, max 6 lembar !!

Datapath Question : How to Connect Bus to Wire in Quartus

!! Nilai Akhir !! (Update 10 Juli 2017)

15 Tel 03 15 Tel 04 15 Tel 05